Research Catalog

Title

Electrical performance of electronic packaging : October 27-29, 1997, The Wyndham Hotel, San Jose, California / sponsored by the IEEE Microwave Theory and Techniques Society and the IEEE Components, Packaging and Manufacturing Technology Society.

Author

Topical Meeting on Electrical Performance of Electronic Packaging (6th : 1997 : Cambridge, Mass.)

Publication

Piscataway, NJ : IEEE Service Center, [1997]

Items in the Library & Off-site

Details

Additional Authors

• IEEE Microwave Theory and Techniques Society.
• Components, Packaging & Manufacturing Technology Society.
• Topical Meeting on Electrical Performance of Electronic Packaging (6th : 1997 : San Jose, Calif.)

Description

x, 264 pages : illustrations; 28 cm

Alternative Title

IEEE 6th Topical Meeting on Electrical Performance of Electronic Packaging

Subjects

• Materials > Electric properties > Congresses
• Electronic packaging > Congresses

Note

• "IEEE Catalog Number: 97TH8318"

Bibliography (note)

• Includes bibliographical references and index.

Contents

The Electrical Challenges of Packaging the IBM AS/400 -- Design Methodology for Chip-on-Chip Applications -- S/390 Cost Performance Considerations for Packaging Choices -- Large-scale Optical Backboard Bus -- Packaging and Power Distribution Design Considerations for a Sun Microsystems Dekstop Workstation -- EMI and Power Delivery Design in PC Systems -- Delta-I Noise Avoidance Methodology for High Performance Chip Designs -- Importance of Damping and Resonance in Thin-Film Integrated Decoupling Capacitor Design -- Low-Cost Technique for Reducing the Simultaneous Switching Noise in Sub-Board Packaging Configurations -- On-Chip Interconnect Modeling Technologies -- Improving the Accuracy of On-Chip Parasitic Extraction -- 3D Global Interconnect Parameter Extractor for Full-Chip Global Critical Path Analysis -- The Importance of Inductance and Inductive Coupling for On-Chip Wiring -- Experimental Electrical Characterization of On-Chip Interconnects -- A Hierarchical Power Supply Distribution Model for Full-Chip Switching Noise Analysis -- Reduction of High-Speed Signal Distortions in Double-Layered Dielectric PCB Interconnects -- A New Technique for the Extraction of SPICE-type Equivalent Circuits from Measured or Computer-S-parameters of Microstrip Components and Discontinuities -- High Frequency Characterization of Interconnection on Glass Fiber Inforced PCB (G30) -- The Enhancement of Static Simulator Package Characterization Through Conductor Segmentation -- Numerical Modeling of Inductance for a Distributed System -- Packaging and Interconnect Design and Analysis using FDTD -- Wideband Crosstalk Analysis of Coupled Bondwires Buried in High-Speed Plastic Packages -- A New Flip-chip Mounting Technique for High Temperature Operation -- Special Types of Coplanar Transmission Lines Suitable up to mm-Wave Bands -- Characterization, Modeling and Optimization of High Power Module Packaging -- A Simultaneous Switching Noise Analysis of a High Speed Memory Module Including the Test Environments & System-level Models -- Effects of Floating Conductive Plane on Effective Inductance -- Flip-Chip Redistribution Layer Electrical Characterization and SSO Noise Simulation -- Characterization of Peripheral and Core SSOs in a Flip-Chip Package -- Validity Ranges of Crosstalk Models -- Simulation vs. Calculation of Crosstalk -- Significance of Electromagnetic Coupling Through Vias in Electronics Packaging -- Adjacent Line Coupling for Long Off Chip Interconnects -- Modelling and Simulation of Electromagnetic Interference in Electronic Circuits -- The PSTD Algorithm: A Fast and Accurate Time-Domain Method for Electronic Package Characterization -- Effects of Heat Spreader on Electrical Characterization of Tape-BGA Packages -- Study of Coupling Phenomena in Transmission Line Structures Covered by Slotted Screens Using the Generalised Circuital Analysis -- Characterizing N-port Packages and Interconnections with a 2-port Network Analyzer -- Characterization of Multiconductor Inhomogeneous Uniformly Coupled Lines from TDR Data -- Accurate Characterization of Board Level Interconnects for High Performance Systems -- Accurate De-embedding of the Contribution of the Test Boards to the High-Frequency Characteristics of Backplane Connectors -- Measurement of Field Simulation Based Characterization of Plastic IC Packages -- Standardizable and Automated Procedures to Measure and Simulate Very Complex 3D Packaging Parasitics with Highest Accuracy, Show for a TSOP50 as Example -- Simulation of Large Packaged Dense Microwave Circuits -- Suppression of Leakage and Crosstalk in Typical Millimeter-Wave Flip-Chip Packages -- A Novel Broadband Flip Chip Interconnection -- Simulation and Performance of Passive Microwave and Millimeter Wave Coplanar Waveguide Circuit Devices with Flip Chip Packaging -- Buried Double Bondwires for Microwave Hermetic Packages -- Ultra Low Loss Millimeter Wave MCM Interconnects -- Circuit Modeling of Isolation in Flip-Chip Microwave Integrated Circuits -- A Method for Evaluating Effect of Package Resonances on Circuit Performance -- Quasi-TEM Model for Coplanar Waveguide on Silicon -- An Introduction to the Fast-MoM in Computational Electromagnetics -- Rapid Electromagnetic Analysis of Multilayer Interconnects -- Improving the Efficiency of Multipole-Accelerated Method-of-Moments Solvers Using Dual Grid Multipole Expansions -- Utilization of Fast Algorithm to Analyze Embedded Passive Components Using Commercial EM Solvers -- A Technique for Fast Calculations of Capacitance Matrices of Interconnect Structures -- Survey of Model Reduction Techniques for Analysis of Package and Interconnect Models of High-Speed Designs -- Time Domain Multiconductor Transmission Line Analysis Using Effective Internal Impedance -- Generating Reduced Order Models via PEEC for Capturing Skin and Proximity Effects.

ISBN

• 0780342038 (softbound)
• 0780342046 (microfiche)

LCCN

97080029

OCLC

ocm37988545

Owning Institutions

Columbia University Libraries